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C compiler optimized instruction set architecture 1 Kbytes of nonvolatile data EEPROM - 4 MHz - 10 MHz oscillator input with PLL active (4x, 8x, 16x) - 8 user-selectable priority levels Modulo and Bit-Reversed modes Two 40-bit wide accumulators with optional saturation logic All DSP instructions are single cycle - Multiply-Accumulate (MAC) operation Three 16-bit timers/counters; optionally pair up 16-bit timers into 32-bit timer modules 3-wire SPI modules (supports four Frame modes) 1 addressable UART module with FIFO buffers 12-bit Analog-to-Digital Converter (ADC) with: Programmable Low-Voltage Detection (PLVD) Programmable Brown-out Reset Flexible Watchdog Timer (WDT) with on-chip low-power RC oscillator for reliable operation Fail-Safe Clock Monitor operation: - Detects clock failure and switches to on-chip low-power RC oscillator Selectable Power Management modes: Low-power, high-speed Flash technology The device is a 18-pin Dual-In-Line package. (Ds pic 30F3012 i/p 16-bit digital signal controller was posted and is owned by: Myrtle Bolton) |
Myrtlebolton@chicagopartsnetwork.com (Myrtle Bolton) for more information.
